Method for manufacturing semiconductor device and plasma oxidation treatment method

ABSTRACT

Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b≧2, and Formula (2), b&gt;0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method for manufacturing asemiconductor device, a plasma oxidation treatment method, and the like.

2. Description of the Related Art

As one type of field-effect transistor, a thin film transistor whosechannel region is formed using a silicon film which is formed over asubstrate having an insulating surface is known. Techniques in whichamorphous silicon, microcrystalline silicon, or polycrystalline siliconis used for forming the silicon film which is used for the channelregion of the thin film transistor have been disclosed (see PatentDocuments 1 to 5). A typical application of the thin film transistor isa liquid crystal television device, in which the thin film transistor ispractically used as a switching transistor in each pixel in a displayscreen.

FIG. 13 is a cross-sectional view of an inverted staggered bottom-gatethin film transistor. This thin film transistor includes a gateelectrode 4 having a stacked structure and formed over a glass substrate10; a gate insulating film 2 formed of a SiN_(X) film that is formed tocover the gate electrode 4; a stacked film in which a microcrystallinesilicon film 1, a silicon film 3, and a pair of impurity silicon films 5a and 5 b are stacked over the gate insulating film 2; wirings 6 a and 6b having a stacked structure over the impurity silicon films 5 a and 5 band functioning as a source and drain electrodes; an insulating film 7formed to cover the wirings 6 a and 6 b; and a gate electrode(hereinafter referred to as a back gate electrode) 8 formed over theinsulating film 7.

In the case of forming an insulating film containing nitrogen such as aSiN_(X) film as the gate insulating film 2, nitrogen in the gateinsulating film 2 inhibits crystallization at the time of forming themicrocrystalline silicon film 1 on an upper portion 2 a of the gateinsulating film 2, whereby an amorphous silicon region (so-calledincubation layer) is formed on the gate insulating film 2. This siliconregion may cause degradation of characteristics of the thin filmtransistor.

At the time right after a portion 3 a, which is located on the backchannel side in the silicon film 3, is exposed by dry etching thesilicon film 3 over the microcrystalline silicon film 1, a siliconregion in the surface of the portion 3 a in which the back channel isformed is damaged by the etching; this may result in a degradation ofcharacteristics of the thin film transistor. Note that the back channelmeans a region facing the back gate electrode and positioned in themicrocrystalline silicon film 1 or the silicon film 3.

REFERENCE Patent Document [Patent Document 1] Japanese Published PatentApplication No. 2001-053283

[Patent Document 2] Japanese Published Patent Application No. H5-129608

[Patent Document 3] Japanese Published Patent Application No.2005-049832

[Patent Document 4] Japanese Published Patent Application No. H7-131030

[Patent Document 5] Japanese Published Patent Application No.2005-191546 SUMMARY OF THE INVENTION

An object of an embodiment of the present invention is to provide amethod for manufacturing a semiconductor device, in which a degradationin characteristics of a thin film transistor can be suppressed byperforming plasma oxidation treatment on a gate insulating filmcontaining nitrogen. Further, another object of an embodiment of thepresent invention is to provide a method for manufacturing asemiconductor device, in which a degradation in characteristics of athin film transistor can be suppressed by performing plasma oxidationtreatment on a back channel side of a semiconductor film. Furthermore,another object of an embodiment of the present invention is to provide aplasma oxidation treatment method with improved oxidizing power.

An embodiment of the present invention is a method for manufacturing asemiconductor device which includes a thin film transistor including agate electrode, a gate insulating film containing nitrogen, and achannel region in a microcrystalline semiconductor film, including thesteps of performing plasma treatment in which the gate insulating filmis exposed to plasma in an oxidizing gas atmosphere containing hydrogenand an oxidizing gas containing an oxygen atom; and forming themicrocrystalline semiconductor film over the gate insulating film, inwhich Formula (1) and Formula (2), preferably Formula (2) and Formula(3), further preferably Formula (2) and Formula (4), still furtherpreferably Formula (2) and Formula (5) are satisfied, where that theamount of hydrogen and the amount of the oxidizing gas in the oxidizinggas atmosphere are a and b, respectively.

a/b≧2   (1)

b>0   (2)

a/b>2   (3)

a/b≧3   (4)

a/b≧4   (5)

An embodiment of the present invention is a method for manufacturing asemiconductor device which includes a thin film transistor including agate electrode, a gate insulating film containing nitrogen, and achannel region in a microcrystalline semiconductor film, including thesteps of performing plasma treatment in which the microcrystallinesemiconductor film is exposed to plasma in an oxidizing gas atmospherecontaining hydrogen and an oxidizing gas containing an oxygen atom;forming an insulating film over the microcrystalline semiconductor film;and forming a back gate electrode over the insulating film, in whichFormula (6) and Formula (7), preferably Formula (7) and Formula (8),further preferably Formula (7) and Formula (9), still further preferablyFormula (7) and Formula (10) are satisfied, where the amount of hydrogenand the amount of the oxidizing gas in the oxidizing gas atmosphere arec and d, respectively.

c/d≧2   (6)

d>0   (7)

c/d>2   (8)

c/d≧3   (9)

c/d≧4   (10)

An embodiment of the present invention is a method for manufacturing asemiconductor device which includes a thin film transistor including agate electrode, a gate insulating film containing nitrogen, and achannel region in a microcrystalline semiconductor film, including thesteps of forming an amorphous semiconductor film over themicrocrystalline semiconductor film after the microcrystallinesemiconductor film is formed over the gate insulating film; performingplasma treatment in which the amorphous semiconductor film is exposed toplasma in an oxidizing gas atmosphere containing hydrogen and anoxidizing gas containing an oxygen atom; forming an insulating film overthe amorphous semiconductor film; and forming a back gate electrode overthe insulating film, in which Formula (6) and Formula (7), preferablyFormula (7) and Formula (8), further preferably Formula (7) and Formula(9), still further preferably Formula (7) and Formula (10) aresatisfied, where the amount of hydrogen and the amount of the oxidizinggas in the oxidizing gas atmosphere are c and d, respectively.

c/d≧2   (6)

d>0   (7)

c/d>2   (8)

c/d≧3   (9)

c/d≧4   (10)

Further, in an embodiment of the present invention, it is preferablethat the oxidizing gas include at least one of oxygen, NO₂, and N₂O.

An embodiment of the present invention is a plasma oxidation treatmentmethod in which an insulating film or a semiconductor film is exposed toplasma in an oxidizing gas atmosphere containing hydrogen and anoxidizing gas containing an oxygen atom, in which Formula (11) andFormula (12), preferably Formula (12) and Formula (13), furtherpreferably Formula (12) and Formula (14), still further preferablyFormula (12) and Formula (15) are satisfied, where the amount ofhydrogen and the amount of the oxidizing gas in the oxidizing gasatmosphere are e and f, respectively.

e/f≧2   (11)

f>0   (12)

e/f>2   (13)

e/f≧3   (14)

e/f≧4   (15)

Further, in an embodiment of the present invention, it is preferablethat the oxidizing gas include at least one of oxygen, NO₂, and N₂O.

With an embodiment of the present invention, a degradation ofcharacteristics of a thin film transistor can be suppressed byperforming plasma oxidation treatment on a gate insulating filmcontaining nitrogen. Further, with an embodiment of the presentinvention, a degradation of characteristics of a thin film transistorcan be suppressed by performing plasma oxidation treatment on a backchannel side of a semiconductor film. Furthermore, with an embodiment ofthe present invention, a plasma oxidation treatment method with improvedoxidizing power can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIGS. 1A to 1D are cross-sectional views illustrating a method formanufacturing a semiconductor device according to an embodiment of thepresent invention;

FIGS. 2A and 2B are cross-sectional views illustrating methods formanufacturing a semiconductor device according to an embodiment of thepresent invention;

FIGS. 3A to 3C are cross-sectional views illustrating a method formanufacturing a semiconductor device according to an embodiment of thepresent invention;

FIG. 4 is a cross-sectional view illustrating a method for manufacturinga thin film transistor formed in a semiconductor device of an embodimentof the present invention;

FIG. 5 shows experimental results of Example 1, that is, a relationbetween the H₂/O₂ flow rate ratio and the thickness of a silicon oxidefilm on a Si wafer;

FIG. 6 shows experimental results of Example 2, that is, a relationbetween the H₂/O₂ flow rate ratio and the thickness of a silicon oxidefilm on a Si wafer;

FIG. 7 shows experimental results of Example 3, that is, a relationbetween the H₂/O₂ flow rate ratio and the thickness of a silicon oxidefilm on a Si wafer;

FIG. 8 shows results of a gate BT test in Example 4;

FIG. 9 shows results of a gate BT test in Example 5;

FIG. 10 shows experimental results of Example 6, that is, a relationbetween the H₂/N₂O flow rate ratio and the thickness of a silicon oxidefilm on a Si wafer;

FIG. 11 shows spectroscopic spectra of H₂, O₂, and a mixed gas of H₂ andO₂ at the time of plasma discharge;

FIG. 12 shows spectroscopic spectra of H₂, N₂O, and a mixed gas of H₂and N₂O at the time of plasma discharge; and

FIG. 13 is a cross-sectional view of an inverted staggered bottom-gatethin film transistor.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the present invention will be described indetail with reference to the drawings. However, the present invention isnot limited to the following description and it is easily understood bythose skilled in the art that the mode and details can be variouslychanged without departing from the scope and spirit of the presentinvention. Therefore, the present invention should not be construed asbeing limited to the description in the following embodiments.

Embodiment 1

In this embodiment, a method for manufacturing a thin film transistorformed in a semiconductor device that is an embodiment of the presentinvention will be described with reference to FIGS. 1A to 1D, FIGS. 2Aand 2B, and FIGS. 3A to 3C. Note that an n-channel thin film transistorhas a higher carrier mobility than a p-channel thin film transistor. Inthis embodiment, a method for manufacturing an n-channel thin filmtransistor will be described.

As illustrated in FIG. 1A, a gate electrode 103 is formed over asubstrate 101. Next, a gate insulating film 105 which covers the gateelectrode 103 (hereinafter also referred to as “first gate electrode”)and contains nitrogen is formed. Then, plasma treatment is performed, inwhich a surface of the gate insulating film 105 is exposed to plasma inan oxidizing gas atmosphere containing hydrogen and oxygen. Then, afirst microcrystalline silicon film 107 is formed over the gateinsulating film 105. It is preferable that the plasma oxidationtreatment and the formation of the first microcrystalline silicon film107 be successively performed using a plasma CVD apparatus, whereby thesurface of the gate insulating film 105 can be prevented from beingcontaminated.

In the plasma treatment on the gate insulating film 105, assuming thatthe amount of hydrogen and the amount of oxygen in the oxidizing gasatmosphere are a and b, respectively, Formula (1) and Formula (2),preferably Formula (2) and Formula (3), further preferably Formula (2)and Formula (4), still further preferably Formula (2) and Formula (5)are satisfied. Accordingly, the oxidizing power of the plasma treatmentcan be drastically improved; as a result, the plasma oxidation treatmentcan be performed in a shorter time.

a/b≧2   (1)

b>0   (2)

a/b>2   (3)

a/b≧3   (4)

a/b≧4   (5)

By performing plasma oxidation treatment in the above-described manner,in which the surface of the gate insulating film 105 is exposed toplasma in the oxidizing gas atmosphere, a negative shift of thethreshold voltage of the thin film transistor can be suppressed. Notethat with such plasma oxidation treatment, a normally-off thin filmtransistor can be manufactured.

In this specification, an n-channel thin film transistor whose value ofthe threshold voltage is positive is defined as a normally-off thin filmtransistor. A p-channel thin film transistor whose value of thethreshold voltage is negative is defined as a normally-off thin filmtransistor. Further, an n-channel thin film transistor whose value ofthe threshold voltage is negative is defined as a normally-on thin filmtransistor. Furthermore, a p-channel thin film transistor whose value ofthe threshold voltage is positive is defined as a normally-on thin filmtransistor.

As the substrate 101, a glass substrate, a ceramic substrate, or thelike can be used. Note that there is no limitation on the size of thesubstrate 101. For example, any of glass substrates of the 3rd to 10thgenerations which are often used in the field of the above flat paneldisplay can be used.

The gate electrode 103 can be formed in the following manner: aconductive film is formed over the substrate 101 by a sputtering methodor a vacuum evaporation method using any metal material of Mo, Ti, Cr,Ta, W, Al, Cu, Nd, Sc, or Ni; a mask is formed over the conductive filmby a photolithography method; and the conductive film is etched usingthe mask. In order to improve adhesion between the gate electrode 103and the substrate 101, a nitride film of any of the above-describedmetal materials may be provided between the substrate 101 and the gateelectrode 103. In this embodiment, a conductive film is formed over thesubstrate 101 and etched using a resist mask formed by aphotolithography method.

Note that side surfaces of the gate electrode 103 are preferablytapered, in order to prevent an insulating film, a silicon film, and awiring formed over the gate electrode 103 in later steps from being cutat a step portion of the gate electrode 103. In order to taper the sidesurfaces of the gate electrode 103, etching may be performed while theresist mask is made to recede.

The gate insulating film 105 can be formed as a single layer or astacked layer using a silicon nitride film, a silicon nitride oxidefilm, and/or a silicon oxynitride film by a CVD method.

The first microcrystalline silicon film 107 includes mixed phase grains.It is preferable that the density of the mixed phase grains (existingpercentage of the mixed phase grains in a plane) be low, the uniformityof grain sizes of the mixed phase grains be high, and the crystallinityof the mixed phase grains be high. Therefore, the first microcrystallinesilicon film 107 may have a space between the adjacent mixed phasegrains without the adjacent mixed phase grains being in contact witheach other. The thickness of the first microcrystalline silicon film 107is preferably greater than or equal to 1 nm and less than or equal to 10nm. In a region having the space between the adjacent mixed phase grainswithout the adjacent mixed phase grains being in contact with eachother, the smallest height of the mixed phase grains which are not incontact with each other is preferably 1 nm or more and the largestheight of the mixed phase grains which are not in contact with eachother is preferably 10 nm or less. Note that the mixed phase grains eachinclude an amorphous silicon region and a plurality of siliconcrystallites that are microcrystals regarded as single crystals ofsilicon. In some cases, the mixed phase grains may include a twincrystal.

The first microcrystalline silicon film 107 is formed in a treatmentchamber of a plasma CVD apparatus, using plasma generated by glowdischarge with the use of a mixture of a deposition gas containingsilicon and hydrogen as a source gas, under a first condition whichenables mixed phase grains serving as nuclei to be formed in the statethat the density of the mixed phase grains is low and the crystallinityof the mixed phase grains is high. Alternatively, the firstmicrocrystalline silicon film 107 is formed using plasma generated byglow discharge with the use of a mixture of a deposition gas containingsilicon, hydrogen, and a rare gas such as helium, neon, or krypton.Here, the microcrystalline silicon is formed under the first conditionin which the pressure inside the treatment chamber is higher than orequal to 67 Pa and lower than or equal to 50000 Pa (higher than or equalto 0.5 Torr and lower than or equal to 375 Torr).

The supplying method of the source gas under the first condition is sucha method that a gas obtained by diluting the deposition gas containingsilicon by setting the flow rate of hydrogen to be greater than or equalto 50 times and less than or equal to 1000 times that of the depositiongas is supplied. The deposition temperature is preferably from roomtemperature to 300° C., and further preferably 150° C. to 280° C. Thedistance between an upper electrode and a lower electrode of the plasmaCVD apparatus may be set to a distance which enables generation ofplasma.

As typical examples of the deposition gas containing silicon, there areSiH₄ and Si₂H₆.

In the case where a rare gas such as helium, argon, neon, krypton, orxenon is mixed into the source gas of the first microcrystalline siliconfilm 107, the deposition rate of the first microcrystalline silicon film107 is increased. Moreover, in the case where the deposition rate isincreased, the amount of impurities mixed in the first microcrystallinesilicon film 107 is reduced, so that the crystallinity of the firstmicrocrystalline silicon film 107 can be improved. Thus, the on-statecurrent and field-effect mobility of the thin film transistor areincreased and throughput of the thin film transistor can also beincreased.

In the glow discharge at the time of forming the first microcrystallinesilicon film 107, the plasma is generated by application ofhigh-frequency power with a frequency of 3 MHz to 30 MHz, typically,13.56 MHz or 27.12 MHz in the HF band, or high-frequency power with afrequency of approximately 30 MHz to 300 MHz in the VHF band, typically60 MHz. It is preferable to determine the power for generating theplasma as appropriate in accordance with the ratio of the flow rate ofhydrogen to the flow rate of the deposition gas containing silicon.

Next, as illustrated in FIG. 1B, a second microcrystalline silicon film109 is formed over the first microcrystalline silicon film 107. Thesecond microcrystalline silicon film 109 includes mixed phase grainseach including silicon crystallites and amorphous silicon, and ispreferably formed under a condition which enables the secondmicrocrystalline silicon film 109 to fill the space between the mixedphase grains of the first microcrystalline silicon film 107 and alsopromotes crystal growth. Note that the thickness of the secondmicrocrystalline silicon film 109 is preferably greater than or equal to30 nm and less than or equal to 100 nm.

The second microcrystalline silicon film 109 is formed in a treatmentchamber of the plasma CVD apparatus, using plasma generated by glowdischarge with the use of a mixture of a deposition gas containingsilicon and hydrogen as a source gas under the second condition.Alternatively, the second microcrystalline silicon film 109 may beformed using plasma generated by glow discharge with the use of amixture of a deposition gas containing silicon, hydrogen, and a rare gassuch as helium, neon, or krypton under the second condition. Here, themicrocrystalline silicon is formed under the second condition in whichthe deposition gas containing silicon is diluted by setting the flowrate of hydrogen to be greater than or equal to 100 times and less thanor equal to 3000 times that of the deposition gas and the pressureinside the treatment chamber is set to be higher than or equal to 1333Pa and lower than or equal to 50000 Pa (higher than or equal to 10 Torrand lower than or equal to 375 Torr). As a result, the ratio of acrystalline region to the amorphous semiconductor region is increased inthe second microcrystalline silicon film 109, whereby the crystallinityis increased. The deposition temperature at this time is preferably fromroom temperature to 300° C., and further preferably 150° C. to 280° C.The distance between an upper electrode and a lower electrode of theplasma CVD apparatus is set to a distance which enables generation ofplasma. By newly generating the mixed phase grains of the secondmicrocrystalline silicon film in the space between the mixed phasegrains of the first microcrystalline silicon film, the size of the mixedphase grains is reduced. Therefore, it is preferable that the frequencyof generation of the mixed phase grains of the second microcrystallinesilicon film be lower than that of the mixed phase grains of the firstmicrocrystalline silicon film.

In the case where a rare gas such as helium, argon, neon, krypton, orxenon is mixed into the source gas of the second microcrystallinesilicon film 109, the crystallinity of the second microcrystallinesilicon film 109 can be increased in a manner similar to that of thefirst microcrystalline silicon film 107. Accordingly, the on-statecurrent and the field-effect mobility of the thin film transistor areincreased and the throughput of the thin film transistor can also beincreased.

The condition for generating plasma by glow discharge at the time offorming the first microcrystalline silicon film 107 can be employed asappropriate for formation of the second microcrystalline silicon film109. In the case where the condition for generating plasma by glowdischarge at the time of forming the first microcrystalline silicon film107 and that at the time of forming the second microcrystalline siliconfilm 109 are the same, throughput can be increased; however, they may bedifferent from each other.

Microcrystalline silicon is a semiconductor having an intermediatestructure between an amorphous structure and a crystalline structure(including single crystal and polycrystal). Microcrystalline silicon isa semiconductor having a third state that is stable in terms of freeenergy and is a crystalline semiconductor having short-range order andlattice distortion, in which columnar or needle-like crystals having agrain size of 2 nm to 200 nm, preferably 10 nm to 80 nm, furtherpreferably 20 nm to 50 nm, still further preferably 25 nm to 33 nm havegrown in a direction normal to the substrate surface. Therefore, thereare some cases in which a crystal grain boundary is formed at theinterface between the columnar or needle-like crystals. Note that themixed phase grain size here means a maximum diameter of a mixed phasegrain in a plane parallel to the substrate surface.

The Raman spectrum of microcrystalline silicon is shifted to a smallerwavenumber region than 520 cm⁻¹ which represents single crystal silicon.That is, the peak of the Raman spectrum of the microcrystalline siliconexists between 520 cm⁻¹ which represents single crystal silicon and 480cm⁻¹ which represents amorphous silicon. Microcrystalline siliconincludes at least 1 at. % or more of hydrogen or halogen to terminate adangling bond. Moreover, the microcrystalline silicon may contain a raregas element such as helium, argon, krypton, or neon to further promotelattice distortion, so that stability is increased and favorablemicrocrystalline silicon can be obtained. Such microcrystalline siliconis disclosed in, for example, U.S. Pat. No. 4,409,134.

In this embodiment, by reducing the space between the mixed phasegrains, a microcrystalline silicon film having high crystallinity can beformed.

Further, by employing a two-step film formation method in which thesecond microcrystalline silicon film 109 is stacked over the firstmicrocrystalline silicon film 107, the space between the mixed phasegrains can be effectively filled; as a result, a microcrystallinesilicon film having large grain size and high crystallinity as well askeeping high film density can be formed. As a result, the field-effectmobility can be increased, and a device with more excellent electricalcharacteristics can be realized.

In this embodiment, the two-step film formation method in which thesecond microcrystalline silicon film 109 is stacked over the firstmicrocrystalline silicon film 107 is employed; however, the two-stepfilm formation method is not a requisite and the microcrystallinesilicon film may be formed using a one-step film formation method or aplural-step film formation method.

Alternatively, a cycle flow process can be employed for at least one ofthe supplying method of the source gas under the first condition and thesupplying method of the source gas under the second condition in thisembodiment. A case in which a cycle flow process is employed for thesupplying method of the source gas under the first condition will bedescribed below. The following description can also apply to a case inwhich a cycle flow process is employed for the supplying method of thesource gas under the second condition.

The supplying method of the source gas under the first condition is asfollows: supply of a gas obtained by diluting the deposition gascontaining silicon by setting the flow rate of hydrogen to be greaterthan or equal to 50 times and less than or equal to 1000 times that ofthe deposition gas and supply of a gas in which the flow rate of thedeposition gas is less than that of the deposition gas in the gassupplied as above and is set so as to primarily cause etching of silicondeposited over the gate insulating film 105 rather than deposition ofsilicon over the gate insulating film 105 are alternately performed.Note that the flow rate of the deposition gas which primarily causes theetching may be 0 sccm. The deposition temperature at this time ispreferably from room temperature to 300° C., and further preferably 150°C. to 280° C. The distance between an upper electrode and a lowerelectrode of the plasma CVD apparatus is set to a distance which enablesgeneration of plasma.

The supplying method of the source gas under the first condition is amethod in which the flow rate of the deposition gas containing siliconis changed to alternate between high and low flow rates duringgeneration of plasma by glow discharge. During the period in which thedeposition gas is supplied at a low flow rate, etching of silicondeposited over the gate insulating film 105 primarily occurs rather thandeposition of silicon over the gate insulating film 105. In contrast,during the period in which the deposition gas is supplied at a high flowrate, deposition of silicon over the gate insulating film 105 primarilyoccurs rather than etching of silicon deposited over the gate insulatingfilm 105. Thus, an amorphous silicon component is selectively etched bythe hydrogen gas during the period in which the deposition gas issupplied at a low flow rate, and the mixed phase grains grow during theperiod in which the deposition gas is supplied at a high flow rate. Bythe repetition of the etching and the growth, the first microcrystallinesilicon film including a small amount of amorphous silicon component andhaving high crystallinity can be obtained.

The supply of the deposition gas at a high flow rate enlarges the mixedphase grains that have already been deposited over the gate insulatingfilm 105 and produces new mixed phase grains over the gate insulatingfilm 105. The supply of the deposition gas at a low flow rate causesetching and removal of the small mixed phase grains that have just beengenerated but leaves the relatively large mixed phase grains that havealready been deposited over the gate insulating film 105. By therepetition of the growth and the etching, the mixed phase grains withsmall grain sizes are reduced. Accordingly, the first microcrystallinesilicon film including many mixed phase grains having large and highlyuniform grain sizes can be obtained.

With the first condition in this manner, crystal growth is promoted andthe crystallinity of the mixed phase grains is increased. That is, thesize of the crystallites included in the mixed phase grains isincreased. Further, the space is formed between the adjacent mixed phasegrains, so that the density of mixed phase grains is lowered.

The use of the above-described supplying method of the source gas inwhich the flow rate of the deposition gas is changed to alternatebetween high and low flow rates makes the grain size of the mixed phasegrains deposited over the gate insulating film 105 large, the uniformityof the mixed phase grains high, and the crystallinity of the mixed phasegrains high as compared to the case of supplying the deposition gas at aconstant flow rate without the flow rate thereof changed.

As described above, at the time of forming the first microcrystallinesilicon film 107, the use of the supplying method of the source gas inwhich the flow rate of the deposition gas is changed to alternatebetween high and low flow rates makes the grain size of the mixed phasegrains deposited over the gate insulating film 105 large and thecrystallinity of the mixed phase grains high as compared to the case ofsupplying the deposition gas at a constant flow rate without the flowrate thereof changed. Further, by employing the two-step film formationmethod in which the second microcrystalline silicon film 109 is stackedover the first microcrystalline silicon film 107, the space between themixed phase grains can be effectively filled; as a result, amicrocrystalline silicon film having large grain size and highcrystallinity as well as keeping high film density can be formed. As aresult, the field-effect mobility can be increased, and a device withmore excellent electrical characteristics can be realized.

Next, as illustrated in FIG. 1C, a silicon film 111 is formed over thesecond microcrystalline silicon film 109. The silicon film 111 includesa microcrystalline silicon region 111 a and an amorphous silicon region111 b. Then, an impurity silicon film 113 is formed over the siliconfilm 111, and a resist mask 115 is formed over the impurity silicon film113.

The silicon film 111 including the microcrystalline silicon region 111 aand the amorphous silicon region 111 b can be formed under a conditionwhich causes partial crystal growth using the second microcrystallinesilicon film 109 as a seed crystal (a condition by which the crystalgrowth is suppressed).

The silicon film 111 is formed in a treatment chamber of the plasma CVDapparatus, using plasma generated by glow discharge with the use of amixture of a deposition gas containing silicon, hydrogen, and a gascontaining nitrogen. As examples of the gas containing nitrogen, thereare ammonia, nitrogen, nitrogen fluoride, and nitrogen chloride.Generation of plasma by glow discharge can be performed in a mannersimilar to that of the first microcrystalline silicon film 107.

In that case, the flow rate ratio of hydrogen to the deposition gascontaining silicon is set to a ratio for forming a microcrystallinesilicon film in a manner similar to that in forming the firstmicrocrystalline silicon film 107 or the second microcrystalline siliconfilm 109, and the gas containing nitrogen is used as a source gas,whereby crystal growth can be suppressed as compared to the depositionconditions for the first microcrystalline silicon film 107 and thesecond microcrystalline silicon film 109. Specifically, at an earlystage of deposition of the silicon film 111, the gas containing nitrogenincluded in the source gas partly suppresses the crystal growth, so thata conical microcrystalline silicon region or a pyramidalmicrocrystalline silicon region grows and an amorphous silicon region isformed. Further, at a middle stage or a later stage of the deposition,crystal growth of the conical or pyramidal microcrystalline siliconregion stops, and only an amorphous silicon region is deposited.Accordingly, in the silicon film 111, the microcrystalline siliconregion 111 a and the amorphous silicon region 111 b which is formedusing a well-ordered silicon film having fewer defects and a steep tailof a level at a valence band edge, can be formed.

Here, a typical example of a condition for forming the silicon film 111is as follows: the flow rate of hydrogen is 10 times to 2000 times,preferably 10 times to 200 times that of the deposition gas containingsilicon. Note that in a typical example of a condition for forming anormal amorphous silicon film, the flow rate of hydrogen is 0 times to 5times that of the deposition gas containing silicon.

In the case where a rare gas such as helium, neon, argon, xenon, orkrypton is introduced into the source gas of the silicon film 111, thedeposition rate can be increased.

It is preferable that the silicon film 111 have a thickness of 50 nm to350 nm, further preferably a thickness of 120 nm to 250 nm.

FIGS. 2A and 2B are enlarged views of the portion between the gateinsulating film 105 and the impurity silicon film 113 illustrated inFIG. 1C.

As illustrated in FIG. 2A, the microcrystalline silicon region 111 a inthe silicon film 111 has a projection and a depression. The projectionhas a conical or pyramidal shape whose width decreases from the secondmicrocrystalline silicon film 109 side toward the amorphous siliconregion 111 b side (a tip of the projection has an acute angle).Alternatively, the microcrystalline silicon region 111 a may have aprojecting (inverted conical or pyramidal) shape whose width increasesfrom the second microcrystalline silicon film 109 side toward theamorphous semiconductor region 111 b side.

By setting the thickness of the first microcrystalline silicon film 107,the second microcrystalline silicon film 109, and the microcrystallinesilicon region 111 a, that is, the distance from the interface betweenthe first microcrystalline silicon film 107 and the gate insulating film105 to the tip of the projection of the microcrystalline silicon region111 a to 5 nm or more and 150 nm or less, the on-state current of thethin film transistor can be increased.

Further, in order to improve the crystallinity of the microcrystallinesilicon region 111 a, it is preferable that the concentration of oxygencontained in the silicon film 111, which is measured by secondary ionmass spectrometry, be less than 1×10¹⁸ atoms/cm³.

The amorphous silicon region 111 b is preferably formed of an amorphoussemiconductor containing nitrogen. The nitrogen of the amorphoussemiconductor containing nitrogen may exist, for example, as an NH groupor an NH₂ group. As the amorphous semiconductor, amorphous silicon canbe used.

Amorphous silicon containing nitrogen is a semiconductor having lowerenergy at an Urbach edge that is measured by a constant photocurrentmethod (CPM) or photoluminescence spectroscopy and a smaller amount ofdefect absorption spectrum, as compared to a conventional amorphoussemiconductor. In other words, as compared to the conventional amorphoussemiconductor, the amorphous silicon containing nitrogen is awell-ordered semiconductor which has few defects and whose tail of alevel at a valence band edge is steep. Since the amorphous siliconcontaining nitrogen has a steep tail of a level at a valence band edge,the band gap is wide and tunnel current does not flow easily. Therefore,when the amorphous silicon containing nitrogen is provided between themicrocrystalline silicon region 111 a and the impurity silicon film 113,the off-state current of the thin film transistor can be reduced. Inaddition, by provision of the amorphous silicon containing nitrogen, theon-state current and the field-effect mobility can be increased.

Further, the peak of a spectrum of the amorphous silicon containingnitrogen that is measured by low-temperature photoluminescencespectroscopy is higher than or equal to 1.31 eV and lower than or equalto 1.39 eV. Note that the peak of a spectrum of microcrystallinesilicon, which is measured by low-temperature photoluminescencespectroscopy is higher than or equal to 0.98 eV and lower than or equalto 1.02 eV. Accordingly, the amorphous silicon containing nitrogen isdifferent from microcrystalline silicon.

The microcrystalline silicon region 111 a, as well as the amorphoussilicon region 111 b, may include an NH group or an NH₂ group.

Further, as illustrated in FIG. 2B, a silicon crystal grain 111 c whosegrain size is greater than or equal to 1 nm and less than or equal to 10nm, preferably greater than or equal to 1 nm and less than or equal to 5nm may be included in the amorphous silicon region 111 b, so that theon-state current and the filed-effect mobility can be further increased.

The microcrystalline silicon having a projecting (conical or pyramidal)shape whose width decreases from the second microcrystalline siliconfilm 109 toward the amorphous silicon region 111 b is formed in thefollowing manner: after the second microcrystalline silicon film isformed under the deposition condition for microcrystalline silicon,crystal growth is caused on such a condition that the crystal growth isless induced and amorphous silicon is deposited.

Since the microcrystalline silicon region 111 a in the silicon film 111has the conical or pyramidal shape or the inverted conical or pyramidalshape, resistance in a vertical direction (film thickness direction) ofwhen voltage is applied between a source and drain electrodes in an onstate, i.e., the resistance of the silicon film 111 can be lowered.Further, tunnel current does not easily flow because amorphous siliconcontaining nitrogen is provided between the microcrystalline siliconregion 111 a and the impurity silicon film 113. Amorphous siliconcontaining nitrogen is a well-ordered semiconductor having few defectsand a steep tail of a level at a valence band edge. Thus, in the thinfilm transistor described in this embodiment, the on-state current andthe field-effect mobility can be increased and the off-state current canbe reduced.

The impurity silicon film 113 is formed using amorphous silicon to whichphosphorus is added, microcrystalline silicon to which phosphorus isadded, or the like. A structure in which amorphous silicon to whichphosphorus is added and microcrystalline silicon to which phosphorus isadded are stacked can also be employed. In the case of forming ap-channel thin film transistor as a thin film transistor, the impuritysilicon film 113 is formed using microcrystalline silicon to which boronis added, amorphous silicon to which boron is added, or the like.

The impurity silicon film 113 is formed in a treatment chamber of theplasma CVD apparatus, using plasma generated by glow discharge with theuse of a mixture of a deposition gas containing silicon, hydrogen, andphosphine (diluted with hydrogen or silane) as a source gas. In the caseof manufacturing a p-channel thin film transistor, the impurity siliconfilm 113 may be formed using plasma generated by glow discharge usingdiborane instead of phosphine.

The resist mask 115 can be formed by a photolithography step.

Next, as illustrated in FIG. 1D, the first microcrystalline silicon film107, the second microcrystalline silicon film 109, the silicon film 111,and the impurity silicon film 113 are etched using the resist mask 115.By this step, the first microcrystalline silicon film 107, the secondmicrocrystalline silicon film 109, the silicon film 111, and theimpurity silicon film 113 are divided into elements, so that a siliconstacked body 117 and an impurity silicon film 121 are formed. Thesilicon stacked body 117 is formed including part of the firstmicrocrystalline silicon film 107, part of the second microcrystallinesilicon film 109, and part of the silicon film 111. The silicon stackedbody 117 is constituted of a microcrystalline silicon region 117 a whichincludes part of the first microcrystalline silicon film 107, part ofthe second microcrystalline silicon film 109, and part of themicrocrystalline silicon region of the silicon film 111 and an amorphoussilicon region 117 b which includes part of the amorphous silicon regionof the silicon film 111. Then, the resist mask 115 is removed.

Then, as illustrated in FIG. 3A, a conductive film 127 is formed overthe impurity silicon film 121. The conductive film 127 is formed by aCVD method, a sputtering method, or a vacuum evaporation method.

Next, as illustrated in FIG. 3B, wirings 129 a and 129 b functioning asa source electrode and a drain electrode are formed by forming a resistmask (not illustrated) by a photolithography step and etching theconductive film 127 with the use of the resist mask. The etching of theconductive film 127 may be either dry etching or wet etching. Note thatone of the wirings 129 a and 129 b functions as a signal line as well asa source electrode or a drain electrode. However, without limitationthereto, a signal line may be provided separately from the source anddrain electrodes.

Next, the impurity silicon film 121 and the silicon stacked body 117 arepartly etched, so that a pair of impurity silicon films 131 a and 131 bfunctioning as a source and drain regions are formed. A silicon stackedbody 133 including a microcrystalline silicon region 133 a and a pair ofamorphous silicon regions 133 b is formed. At this time, the siliconstacked body 117 is etched so as to expose the microcrystalline siliconregion 133 a, so that the silicon stacked body 133 is formed in whichthe microcrystalline silicon region 133 a and the amorphous siliconregions 133 b are stacked in regions covered with the wirings 129 a and129 b and the microcrystalline silicon region 133 a is exposed in aregion covered with neither the wiring 129 a nor the wiring 129 b andoverlapping with the gate electrode.

Next, dry etching may be performed on the silicon stacked body 133. Asthe condition for the dry etching, a condition by which the exposedmicrocrystalline silicon region 133 a and the exposed amorphous siliconregions 133 b are not damaged and in which the etching rate of themicrocrystalline silicon region 133 a and the amorphous silicon regions133 b is low is used. As an etching gas, Cl₂, CF₄, N₂, or the like istypically used.

Through the above-described process, a single-gate thin film transistorcan be manufactured. A single-gate thin film transistor with lowoff-state current, high on-state current, and high field-effect mobilitycan be manufactured with high productivity.

Note that in this embodiment, a thin film transistor whose gateelectrode is located below a channel region has been described as asemiconductor device according to an embodiment of the presentinvention; however, the present invention may also be applied to adual-gate thin film transistor whose back gate electrode is locatedabove a channel region as a semiconductor device according to anembodiment of the present invention. In this case, the dual-gate thinfilm transistor can be manufactured through the following process afterthe above-described process.

Plasma treatment is performed in which surfaces of the microcrystallinesilicon region 133 a and the amorphous silicon regions 133 b illustratedin FIG. 3B are exposed to plasma in an oxidizing gas atmospherecontaining hydrogen and oxygen, and then as illustrated in FIG. 3C, aninsulating film 137 is formed over the silicon stacked body 133 and thewirings 129 a and 129 b. The insulating film 137 can be formed in amanner similar to that for the gate insulating film 105. It ispreferable that the plasma oxidation treatment and the formation of theinsulating film 137 be successively performed using a plasma CVDapparatus, whereby contaminations of the surfaces of themicrocrystalline silicon region 133 a and the amorphous silicon regions133 b, for example, a back channel surface can be suppressed.

In the plasma treatment on the microcrystalline silicon region 133 a andthe amorphous silicon regions 133 b, assuming that the amount ofhydrogen and the amount of oxygen in the oxidizing gas atmosphere are cand d, respectively, Formula (6) and Formula (7), preferably Formula (7)and Formula (8), further preferably Formula (7) and Formula (9), stillfurther preferably Formula (7) and Formula (10) are satisfied.Accordingly, the oxidizing power of the plasma treatment can bedrastically improved; as a result, the plasma oxidation treatment can beperformed in a shorter time.

c/d≧2   (6)

d>0   (7)

c/d>2   (8)

c/d≧3   (9)

c/d≧4   (10)

Next, an opening (not illustrated) is formed in the insulating film 137with the use of a resist mask formed by a photolithography step. Then, aback gate electrode 139 is formed over the insulating film 137 (see FIG.3C). Through the above-described process, a dual-gate thin filmtransistor can be manufactured.

The back gate electrode 139 can be formed in a manner similar to that ofthe wirings 129 a and 129 b. Alternatively, the back gate electrode 139can be formed using a light-transmitting conductive material.

The back gate electrode 139 can be formed in parallel to the gateelectrode 103. In this case, the potential applied to the back gateelectrode 139 and the potential applied to the gate electrode 103 caneach be controlled independently. Thus, the threshold voltage of thethin film transistor can be controlled. Further, regions in whichcarriers flow, that is, channel regions, are formed on the gateinsulating film 105 side and on the insulating film 137 side in themicrocrystalline silicon region; thus, the on-state current of the thinfilm transistor can be increased.

The back gate electrode 139 can be connected to the gate electrode 103.That is, the gate electrode 103 and the back gate electrode 139 can beconnected through an opening (not illustrated) formed in the gateinsulating film 105 and the insulating film 137. In this case, thepotential applied to the back gate electrode 139 and the potentialapplied to the gate electrode 103 are equal. As a result, regions inwhich carriers flow, that is, channel regions are formed on the gateinsulating film 105 side and on the insulating film 137 side in themicrocrystalline silicon region; thus, the on-state current of the thinfilm transistor can be increased.

Further alternatively, the back gate electrode 139 is not necessarilyconnected to the gate electrode 103 and may be in a floating state. Inthat case, channel regions are formed on the gate insulating film 105side and on the insulating film 137 side in the microcrystalline siliconregion without a potential applied to the back gate electrode 139; thus,the on-state current of the thin film transistor can be increased.

Further, the back gate electrode 139 may overlap with the wirings 129 aand 129 b with the insulating film 137 provided therebetween.

Through the above-described process, a single-gate thin film transistorand a dual-gate thin film transistor having high on-state current, highfield-effect mobility, low off-state current, and small variation can bemanufactured. In the case where, after exposing a gate insulating filmto oxygen plasma, a microcrystalline silicon film as in Embodiment 1 isformed for a channel region, a thin film transistor which is normallyoff as well as having the above-described effects can be manufactured.

According to this embodiment, the surface of the gate insulating film105 can be oxidized by being subjected to plasma treatment in which thesurface of the gate insulating film 105 is exposed to plasma in anoxidizing gas atmosphere containing hydrogen and oxygen even in the caseof using an insulating film containing nitrogen as the gate insulatingfilm 105. Accordingly, crystallization of a microcrystalline siliconfilm can be prevented from being inhibited by nitrogen in the gateinsulating film 105 at the time of forming the microcrystalline siliconfilm over the gate insulating film 105, which can prevent formation ofan amorphous silicon region (so-called incubation layer) on the gateinsulating film 105. Thus, degradation of characteristics of the thinfilm transistor can be suppressed.

According to this embodiment, even in the case where a portion placed onthe back channel side in the microcrystalline silicon film is damaged byetching part of the impurity silicon film 121 and part of the siliconstacked body 117, the damaged portion in the microcrystalline siliconfilm can be oxidized by performing plasma treatment in which a surfaceof the microcrystalline silicon film is exposed to plasma in anoxidizing gas atmosphere containing hydrogen and oxygen. By forming anoxide film on the surface of the back channel in this manner, adegradation of characteristics of the thin film transistor can besuppressed.

Embodiment 2

This embodiment is the same as Embodiment 1 except the following points.

In Embodiment 1, plasma treatment in which the surface of the gateinsulating film 105 illustrated in FIG. 1A is exposed to plasma in anoxidizing gas atmosphere containing hydrogen and oxygen is performed,while in this embodiment, plasma treatment with plasma in an oxidizinggas atmosphere containing hydrogen and N₂O is performed.

In the plasma treatment on the gate insulating film 105, assuming thatthe amount of hydrogen and the amount of N₂O in the oxidizing gasatmosphere are e and f, respectively, Formula (11) and Formula (12),preferably Formula (12) and Formula (13), further preferably Formula(12) and Formula (14), still further preferably Formula (12) and Formula(15) are satisfied. Accordingly, the oxidizing power of the plasmatreatment can be drastically improved; as a result, the plasma oxidationtreatment can be performed in a shorter time.

e/f≧2   (11)

f>0   (12)

e/f>2   (13)

e/f≧3   (14)

e/f≧4   (15)

In Embodiment 1, plasma treatment in which the surfaces of themicrocrystalline silicon region 133 a and the amorphous silicon regions133 b illustrated in FIG. 3B are exposed to plasma in an oxidizing gasatmosphere containing hydrogen and oxygen is performed, while in thisembodiment, plasma treatment with plasma in an oxidizing gas atmospherecontaining hydrogen and N₂O is performed.

In the plasma treatment on the microcrystalline silicon region 133 a andthe amorphous silicon regions 133 b, assuming that the amount ofhydrogen and the amount of N₂O in the oxidizing gas atmosphere are g andh, respectively, Formula (16) and Formula (17), preferably Formula (17)and Formula (18), further preferably Formula (17) and Formula (19),still further preferably Formula (17) and Formula (20) are satisfied.Accordingly, the oxidizing power of the plasma treatment can bedrastically improved; as a result, the plasma oxidation treatment can beperformed in a shorter time.

g/h≧2   (16)

h>0   (17)

g/h>2   (18)

g/h≧3   (19)

g/h≧4   (20)

Advantageous effects similar to those of Embodiment 1 can also beobtained in this embodiment.

Embodiment 3

In this embodiment, a method for manufacturing a thin film transistorformed in a semiconductor device that is one embodiment of the presentinvention will be described with reference to FIG. 4. FIG. 4 illustratesa step corresponding to the step illustrated in FIG. 3B.

In a manner similar to that of Embodiment 1, a conductive film 127 isformed through the process of FIGS. 1A to 1D and FIG. 3A.

Then, as illustrated in FIG. 4, wirings 129 a and 129 b are formed andan impurity silicon film 121 and a silicon stacked body 117 are partlyetched, so that a pair of impurity silicon films 131 a and 131 b servingas a source region and a drain region are formed in a manner similar tothat of Embodiment 1. A silicon stacked body 143 including amicrocrystalline silicon region 143 a and an amorphous silicon region143 b is formed. At this time, the silicon stacked body 117 is etched soas to expose the amorphous silicon region 143 b, so that the siliconstacked body 143 is formed in which the microcrystalline silicon region143 a and the amorphous silicon region 143 b are stacked in regionscovered with the wiring 129 a or 129 b and the microcrystalline siliconregion 143 a is not exposed and the amorphous silicon region 143 b isexposed in a region covered with neither the wiring 129 a nor the wiring129 b and overlapping with the gate electrode. Note that the etchingamount of the silicon stacked body 117 is smaller than that in the caseof FIG. 3B.

The subsequent process is similar to that of Embodiment 1. However, inEmbodiment 1, plasma treatment in which the surface of themicrocrystalline silicon region 133 a illustrated in FIG. 3B is exposedto plasma in an oxidizing gas atmosphere containing hydrogen and oxygenis performed, which is different from this embodiment in which plasmatreatment in which a surface of the amorphous silicon region 143 billustrated in FIG. 4 is exposed to plasma in an oxidizing gasatmosphere containing hydrogen and oxygen is performed.

Through the above-described process, a single-gate thin film transistorcan be manufactured. Since the back channel side of the thin filmtransistor is amorphous, the off-state current can be reduced ascompared to the thin film transistor illustrated in FIG. 3B.

Further in this embodiment, after the step illustrated in FIG. 4, a backgate electrode 139 may be formed over an insulating film 137 as in thestep illustrated in FIG. 3C or may not be formed.

Advantageous effects similar to those of Embodiment 1 can be obtained inthis embodiment.

Embodiment 4

This embodiment is the same as Embodiment 3 except the following points.

In Embodiment 3, plasma treatment in which the surface of the gateinsulating film 105 illustrated in FIG. 1A is exposed to plasma in anoxidizing gas atmosphere containing hydrogen and oxygen is performed,while in this embodiment, plasma treatment with plasma in an oxidizinggas atmosphere containing hydrogen and N₂O is performed.

In the plasma treatment on the gate insulating film 105, assuming thatthe amount of hydrogen and the amount of N₂O in the oxidizing gasatmosphere are e and f, respectively, Formula (11) and Formula (12),preferably Formula (12) and Formula (13), further preferably Formula(12) and Formula (14), still further preferably Formula (12) and Formula(15) are satisfied. Accordingly, the oxidizing power of the plasmatreatment can be drastically improved; as a result, the plasma oxidationtreatment can be performed in a shorter time.

e/f≧2   (11)

f>0   (12)

e/f>2   (13)

e/f≧3   (14)

e/f≧4   (15)

In Embodiment 3, plasma treatment in which the surface of the amorphoussilicon region 143 b illustrated in FIG. 4 is exposed to plasma in theoxidizing gas atmosphere containing hydrogen and oxygen is performed,while in this embodiment, plasma treatment with plasma in an oxidizinggas atmosphere containing hydrogen and N₂O is performed.

In the plasma treatment on the amorphous silicon region 143 b, assumingthat the amount of hydrogen and the amount of N₂O in the oxidizing gasatmosphere are g and h, respectively, Formula (16) and Formula (17),preferably Formula (17) and Formula (18), further preferably Formula(17) and Formula (19), still further preferably Formula (17) and Formula(20) are satisfied. Accordingly, the oxidizing power of the plasmatreatment can be drastically improved; as a result, the plasma oxidationtreatment can be performed in a shorter time.

g/h≧2   (16)

h>0   (17)

g/h>2   (18)

g/h≧3   (19)

g/h≧4   (20)

Advantageous effects similar to those of Embodiment 3 can be obtained inthis embodiment.

EXAMPLES Example 1

In this example, an experiment was conducted on the plasma treatment inwhich the surface of the microcrystalline silicon film illustrated inFIG. 3B in Embodiment 1 was exposed to plasma in the oxidizing gasatmosphere containing hydrogen and oxygen. The method and results of theexperiment will be described.

The method of the experiment was as follows. First, a Si wafer wassubjected to treatment with HF for 90 seconds, so that an oxide film ona surface of the Si wafer was removed. Next, the Si wafer was introducedinto a plasma CVD apparatus, and plasma treatment in which the surfaceof the Si wafer was exposed to plasma in an oxidizing gas atmospherecontaining hydrogen and oxygen was performed with the plasma CVDapparatus, so that a silicon oxide film was formed on the Si wafer. Theplasma treatment conditions at this time were such that parallel-plateelectrodes were used for generating plasma, the gap between theelectrodes was 15 mm, the high-frequency power supplied to theelectrodes was 300 W or 600 W, the treatment pressure was 1250 Pa, thetreatment temperature of the upper electrode was 250° C., the treatmenttemperature of the lower electrode was 290° C., the treatment time was180 seconds, the total gas flow rate of hydrogen and oxygen was 1000sccm, and the ratio of hydrogen to oxygen was variously changed.

Next, the thickness of the silicon oxide film on the Si wafer wasmeasured with a spectroscopic ellipsometer. The measurement wasconducted at in-plane 9 points on the Si wafer.

FIG. 5 is a graph showing experimental results in Example 1, that is, arelation between the H₂/O₂ flow rate ratio and the thickness of thesilicon oxide film on the Si wafer. A broken line shows the measurementresults in the case where the high-frequency power was 300 W, and asolid line shows those in the case where the high-frequency power was600 W. It was recognized from FIG. 5 that both in the case of thehigh-frequency power of 300 W and in the case of the high-frequencypower of 600 W, when the proportion of hydrogen increases and the flowrate ratio exceeds the ratio H₂/O₂=2/1 (667 sccm/333 sccm) (that is,when the flow rate ratio of H₂/O₂ is 2 or more), preferably when theflow rate ratio of H₂/O₂ is 3 or more, the thickness of the oxide filmis increased drastically and oxidation on the Si wafer is promoted.

Example 2

In this example, an experiment was conducted on the plasma treatment inwhich the surface of the microcrystalline silicon film illustrated inFIG. 3B in Embodiment 1 was exposed to plasma in the oxidizing gasatmosphere containing hydrogen and oxygen. The method and results of theexperiment will be described.

The method of the experiment was the same as that of Example 1 exceptthat the high-frequency power supplied to the electrodes of the plasmaCVD apparatus was 600 W, the total gas flow rate of hydrogen and oxygenwas 1000 sccm or 2000 sccm, and measurement was conducted also at higherratios (dilution ratios) of hydrogen to oxygen than those in Example 1.A broken line shows the measurement results in the case where the totalgas flow rate was 1000 sccm, and a solid line shows those in the casewhere the total gas flow rate was 2000 sccm.

FIG. 6 is a graph showing experimental results in Example 2, that is, arelation between the H₂/O₂ flow rate ratio and the thickness of thesilicon oxide film on the Si wafer. It was recognized from FIG. 6 thateven when the concentration of hydrogen is further increased from theconcentration in FIG. 5, oxidation on the Si wafer can be promoted.

Example 3

In this example, an experiment was conducted on the plasma treatment inwhich the surface of the microcrystalline silicon film illustrated inFIG. 3B in Embodiment 1 was exposed to plasma in the oxidizing gasatmosphere containing hydrogen and oxygen. The method and results of theexperiment will be described.

The method of the experiment was the same as that of Example 1 exceptthat measurement was performed also on a case in which the treatment gaswas only hydrogen without including an oxidizing gas at all and on acase in which the treatment gas was only oxygen that was not dilutedwith hydrogen at all; the high-frequency power supplied to theelectrodes of the plasma CVD apparatus in the case where the treatmentgas was only hydrogen and in the case where the treatment gas was onlyoxygen was 650 W; and the high-frequency power supplied to theelectrodes of the plasma CVD apparatus in the other cases was 600 W.

FIG. 7 is a graph showing experimental results in Example 3, that is, arelation between the H₂/O₂ flow rate ratio and the thickness of thesilicon oxide film on the Si wafer.

According to FIG. 7, the thickness of the oxide film formed using O₂plasma generated in the case where the treatment gas was only oxygen wasalmost the same as those of the oxide films formed using treatment gaseswith low dilution with H₂. It can be guessed that the thickness of theoxide film formed in the case where the treatment gas was only oxygen isa little larger than those in the other cases with low dilution becausethe high-frequency power was about 50 W higher than those in the othercases with low dilution.

According to FIG. 7, the thickness of the oxide film formed using O₂plasma generated in the case where the treatment gas was only oxygenvaried more than those of the oxide films formed using treatment gasesdiluted with H₂. Thus, it was confirmed that a variation in thethickness of the oxide film formed on the surface of the Si wafer can bereduced by dilution with H₂.

Further, according to FIG. 7, it was observed that the thickness of theoxide film formed using H₂ plasma generated in the case where thetreatment gas was only hydrogen was largely varied in the plane, thatis, it increased toward the edge of the Si wafer and decreased towardthe center of the Si wafer. Although not shown in FIG. 7, the fittingvalue obtained with a spectroscopic ellipsometer did not match awaveform that was roughly calculated with the use of the nk value ofSiON; thus, it is guessed that a film with a composition other than SiONis formed.

Example 4

In this example, dual-gate thin film transistors according to Embodiment1 were formed under the conditions described below; one was acomparative example formed in such a manner that the surface of themicrocrystalline silicon film illustrated in FIG. 3B was exposed toplasma in an oxidizing gas atmosphere of H₂O, the others were formed insuch a manner that the surface of the microcrystalline silicon film wassubjected to the plasma treatment which is the same as that in Example1.

<Film Formation Conditions> (1) Film Formation of the Gate InsulatingFilm 105

Gate insulating film: SiNFilm formation apparatus: plasma CVD apparatusSource gas and gas flow rate: SiH₄/NH₃/N₂/H₂=15/500/180/200 sccmFilm formation pressure: 100 PaHigh-frequency power: 200 W

Gap between parallel-plate upper and lower electrodes: 30 mm

Film formation temperature: the upper electrode 250° C./ the lowerelectrode 290° C.

Thickness: 300 nm (2) Plasma Treatment on the Surface of the GateInsulating Film 105

Treatment apparatus: plasma CVD apparatus (used continuously from thefilm formation of the gate insulating film)Source gas and gas flow rate: N₂O=400 sccmTreatment pressure: 60 PaHigh-frequency power: 300 WGap between the parallel-plate upper and lower electrodes: 30 mmTreatment temperature: the upper electrode 250° C./ the lower electrode290° C.Treatment time: 180 sec.

(3) Film Formation of the First Microcrystalline Silicon Film 107

Film formation apparatus: plasma CVD apparatus (used continuously fromthe plasma treatment of the gate insulating film)Source gas and gas flow rate: SiH₄/H₂/Ar=4/750/750 sccmFilm formation pressure: 532 PaHigh-frequency power: 150 WGap between the parallel-plate upper and lower electrodes: 15 mmFilm formation temperature: the upper electrode 250° C./ the lowerelectrode 290° C.Film formation time: 27 sec.

(4) Film Formation of the Second Microcrystalline Silicon Film 109

Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the first microcrystalline silicon film)Source gas and gas flow rate: SiH₄/H₂/Ar=1.8/750/750 sccmFilm formation pressure: 5000 PaHigh-frequency power: 125 WGap between the parallel-plate upper and lower electrodes: 7 mmFilm formation temperature: the upper electrode 250° C./ the lowerelectrode 290° C.

Thickness: 65 nm (5) Film Formation of the Silicon Film 111

Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the second microcrystalline silicon film)Source gas and gas flow rate: SiH₄/(1000 ppm NH₃/H₂)/H₂/Ar=20/50/700/750sccmFilm formation pressure: 350 PaHigh-frequency power: 60 W (13.56 MHz)Gap between parallel-plate upper and lower electrodes: 25 mmFilm formation temperature: the upper electrode 250° C./ the lowerelectrode 290° C.

Thickness: 80 nm (6) Film Formation of the Impurity Silicon Film 113

Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the silicon film)Source gas and gas flow rate: SiH₄/(0.5% PH₃/H₂)/H₂=80/150/750 sccmFilm formation pressure: 350 PaHigh-frequency power: 30 WGap between the parallel-plate upper and lower electrodes: 15 mmFilm formation temperature: the upper electrode 250° C./ the lowerelectrode 290° C.

Thickness: 50 nm (7) Film Formation of the Insulating Film 137

Insulating film: SiNFilm formation apparatus: plasma CVD apparatusSource gas and gas flow rate: SiH₄/NH₃/N₂/H₂=15/500/180/200 sccmFilm formation pressure: 100 PaHigh-frequency power: 200 WGap between the parallel-plate upper and lower electrodes: 30 mmFilm formation temperature: the upper electrode 250° C./the lowerelectrode 290° C.

Thickness: 300 nm (8) Plasma Treatment on the Surface of theMicrocrystalline Silicon Region 133 a (8-1) Example

Treatment apparatus: plasma CVD apparatusTreatment gas and gas flow rate: H₂/O₂=500 sccm/500 sccm, 667 sccm/333sccm, 800 sccm/200 sccm, 925 sccm/75 sccm, 970 sccm/30 sccmTreatment pressure: 1250 PaHigh-frequency power: 600 WGap between the parallel-plate upper and lower electrodes: 15 mmTreatment temperature: the upper electrode 250° C./the lower electrode290° C.Treatment time: 180 sec.

(8-2) Comparative Example

Treatment apparatus: plasma CVD apparatusTreatment gas and gas flow rate: H₂O=300 sccmTreatment pressure: 67 PaHigh-frequency power: 1800 WTreatment time: 180 sec.

Next, initial characteristics measurement and the gate BT test underheated condition were conducted on the thin film transistors of theabove example and the thin film transistor of the comparative example.As a result, there was no significant difference in initialcharacteristics, but was a difference in reliability in the gate BT testunder the heated condition as shown in FIG. 8.

<Gate BT Test>

The gate BT test is a method for examining the reliability of atransistor and is a bias-temperature stress test. The gate BT test isone type of acceleration test to evaluate a change in transistorcharacteristics caused by long-time use in a short time. In particular,the amount of change in the threshold voltage (also referred to as Vth)of a transistor between before and after the gate BT test is animportant indicator for examining reliability. The smaller amount ofchange in threshold voltage between before and after the gate BT testmeans higher reliability.

Specifically, the temperature of a substrate over which a transistor isformed is set at fixed temperature (85° C.), the potentials of a sourceand a drain of the transistor are set to be almost equal, and a gate issupplied with a potential different from those of the source and thedrain for a certain period. The gate BT test in the case where thepotential applied to the gate is higher than the potentials of thesource and the drain is referred to as a positive gate BT test, and thegate BT test in the case where the potential applied to the gate islower than the potentials of the source and the drain is referred to asa negative gate BT test.

According to FIG. 8, when the proportion of hydrogen increases and theflow rate ratio exceeds the ratio H₂/O₂=2/1 (667 sccm/333 sccm),preferably when the flow rate ratio of H₂/O₂ is 4 or more, ΔShift andΔVth of the thin film transistor, which are deterioration amounts by thepositive gate BT test, are both reduced. This may result from therecovery of damage on the back channel surface by the plasma oxidationtreatment. Note that ΔShift means the amount of change in shift value.Further, ΔVth means the amount of change in threshold voltage. Here, theshift value is defined as a gate voltage at the intersection of a linehaving the highest inclination of a curve plotted with gate voltage asthe horizontal axis and the logarithm of drain current as the verticalaxis, and a line representing a drain current of 1×10⁻¹² A.

Example 5

In this example, single-gate thin film transistors according toEmbodiment 1 were formed under the conditions described below; one wasformed in such a manner that the surface of the gate insulating film 105illustrated in FIG. 1A was subjected to the plasma treatment which isthe same as that in Example 1, the others were a comparative example 1and a comparative example 2 which were formed in such a manner that thesurface of the gate insulating film was exposed to plasma in anoxidizing gas atmosphere of N₂O or O₂.

<Film Formation Conditions> (b 1) Film Formation of the Gate InsulatingFilm 105 (Common Among Example and the Comparative Examples)

Gate insulating film: SiNFilm formation apparatus: plasma CVD apparatusSource gas and gas flow rate: SiH₄/NH₃/N₂/H₂=15/500/180/200 sccmFilm formation pressure: 100 PaHigh-frequency power: 200 WGap between parallel-plate upper and lower electrodes: 30 mmFilm formation temperature: the upper electrode 250° C./the lowerelectrode 290° C.

Thickness: 300 nm (2) Plasma Treatment on the Surface of the GateInsulating Film 105 (2-1) Example

Treatment apparatus: plasma CVD apparatus (used continuously from thefilm formation of the gate insulating film)Treatment gas and gas flow rate: H₂/O₂=800 sccm/200 sccmTreatment pressure: 1250 PaHigh-frequency power: 900 WGap between the parallel-plate upper and lower electrodes: 15 mmTreatment temperature: the upper electrode 250° C./the lower electrode290° C.Treatment time: 180 sec.

(2-2) Comparative Example 1

Treatment apparatus: plasma CVD apparatus (used continuously from thefilm formation of the gate insulating film)Treatment gas and gas flow rate: N₂O=400 sccmTreatment pressure: 60 PaHigh-frequency power: 300 WGap between the parallel-plate upper and lower electrodes: 30 mmTreatment temperature: the upper electrode 250° C./ the lower electrode290° C.Treatment time: 180 sec.

(2-3) Comparative Example 2

Treatment apparatus: plasma CVD apparatus (used continuously from thefilm formation of the gate insulating film)Treatment gas and gas flow rate: O₂=1000 sccmTreatment pressure: 1250 PaHigh-frequency power: 900 WGap between the parallel-plate upper and lower electrodes: 15 mmTreatment temperature: the upper electrode 250° C./ the lower electrode290° C.Treatment time: 180 sec.

(3) Film Formation of the First Microcrystalline Silicon Film (CommonAmong Example and the Comparative Examples)

Film formation apparatus: plasma CVD apparatus (used continuously fromthe plasma treatment of the gate insulating film)Source gas and gas flow rate: SiH₄/H₂/Ar=3/750/750 sccmFilm formation pressure: 1250 PaHigh-frequency power: 100 WGap between the parallel-plate upper and lower electrodes: 15 mmFilm formation temperature: the upper electrode 250° C./ the lowerelectrode 290° C.Film formation time: 40 sec.

(4) Film Formation of the Second Microcrystalline Silicon Film (CommonAmong Example and the Comparative Examples)

Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the first microcrystalline silicon film)Source gas and gas flow rate: SiH₄/H₂/Ar=2.0/1500/1500 sccmFilm formation pressure: 10000 PaHigh-frequency power: 350 WGap between the parallel-plate upper and lower electrodes: 7 mmFilm formation temperature: the upper electrode 250° C./the lowerelectrode 290° C.

Thickness: 65 nm

(5) Film Formation of the Third Microcrystalline Silicon Film (With theUse of Cycle Flow Process in which the Flow Rate of SiH₄ is AlternatelyIncreased and Decreased)Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the second microcrystalline silicon film)Gas flow rate and time of Source gas: SiH₄ (High/Low=1/0.1 sccm,High/Low=10/5 sec.)

H₂/Ar=1500 sccm/1500 sccm

Film formation pressure: 10000 PaHigh-frequency power: 350 WGap between the parallel-plate upper and lower electrodes: 25 mmFilm formation temperature: the upper electrode 250° C./the lowerelectrode 290° C.

Thickness: 25 nm (6) Film Formation of the Silicon Film 111 (CommonAmong Example and the Comparative Examples)

Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the second microcrystalline silicon film)Source gas and gas flow rate: SiH₄/(1000 ppm NH₃/H₂)/H₂/Ar=20/50/700/750sccmFilm formation pressure: 350 PaHigh-frequency power: 60 W (13.56 MHz)Gap between the parallel-plate upper and lower electrodes: 25 mmFilm formation temperature: the upper electrode 250° C./the lowerelectrode 290° C.

Thickness: 80 nm (7) Film Formation of the Impurity Silicon Film 113(Common Among Example and the Comparative Examples)

Film formation apparatus: plasma CVD apparatus (used continuously fromthe film formation of the silicon film)Source gas and gas flow rate: SiH₄/(0.5% PH₃/H₂)/H₂=99/180/1221 sccmFilm formation pressure: 1050 PaHigh-frequency power: 60 W (pulsed discharge, 10 kHz, ON 30%, OFF 70%)Gap between the parallel-plate upper and lower electrodes: 15 mmFilm formation temperature: the upper electrode 250° C./the lowerelectrode 290° C.

Thickness: 50 nm

Next, initial characteristics measurement and the gate BT test underheated condition were conducted on the thin film transistor of the aboveexample and the thin film transistors of the comparative examples 1 and2 in a manner similar to that of Example 4. As a result, it wasrecognized that as illustrated in FIG. 9, initial characteristics andreliability are both high in Example formed using the plasma treatmentcapable of promoting oxidation, as compared to those in the comparativeexamples 1 and 2 formed using the plasma treatment in which the surfaceof the gate insulating film 105 was exposed to plasma in the oxidizinggas atmosphere of N₂O or O₂. That is, with the use of plasma treatmentusing a mixed gas of oxygen diluted with hydrogen, oxidation is promotedby hydrogen and thereby characteristics of a thin film transistor can beimproved.

Example 6

In this example, an experiment was conducted on the plasma treatment inwhich the surface of the gate insulating film 105 illustrated in FIG. 1Ain Embodiment 2 was exposed to plasma in the oxidizing gas atmospherecontaining hydrogen and N₂O. The method and results of the experimentwill be described.

The method of the experiment was as follows. First, a Si wafer wassubjected to treatment with HF for 90 seconds, so that an oxide film ona surface of the Si wafer was removed. Next, the Si wafer was introducedinto a plasma CVD apparatus, and plasma treatment in which the surfaceof the Si wafer was exposed to plasma in an oxidizing gas atmospherecontaining hydrogen and N₂O was performed with the plasma CVD apparatus,so that a silicon oxide film was formed on the Si wafer. The plasmatreatment conditions at this time were such that parallel-plateelectrodes were used for generating plasma, the gap between theelectrodes was 15 mm, the high-frequency power supplied to theelectrodes was 300 W, 600 W or 900 W, the treatment pressure was 1250Pa, the treatment temperature of the upper electrode was 250° C., thetreatment temperature of the lower electrode was 290° C., the treatmenttime was 180 seconds, the total gas flow rate of hydrogen and N₂O was1000 sccm, and the ratio of hydrogen to oxygen was variously changed.

Next, the thickness of the silicon oxide film on the Si wafer wasmeasured with a spectroscopic ellipsometer. The measurement wasconducted at in-plane 9 points on the Si wafer.

FIG. 10 is a graph showing experimental results in Example 6, that is, arelation between the H₂/N₂O flow rate ratio and the thickness of thesilicon oxide film on the Si wafer. It was recognized from FIG. 10 thatin any of the cases where the high-frequency power was 300 W, 600 W and900 W, when the proportion of hydrogen increases and the flow rate ratioexceeds the ratio H₂/N₂O=2/1 (667 sccm/333 sccm) (that is, when the flowrate ratio of H₂/N2O is 2 or more), the thickness of the oxide film isincreased drastically and oxidation on the Si wafer is promoted.

According to Examples 1 and 6, it can be found that when the flow rateratio of hydrogen gas/an oxidizing gas is 2 or more, oxidation on the Siwafer is promoted.

That is, it was confirmed that addition of a hydrogen gas to anoxidizing gas promotes oxidation in plasma treatment.

Considerations of Examples 1 to 6

The reason why oxidation is promoted by addition of a large amount of H₂to an oxidizing gas will be considered. It can be guessed that in thecase of using a mixed gas of H₂ and O₂ or a mixed gas of H₂ and N₂O inthe plasma treatment in Examples 1 to 6, OH radicals are generatedduring plasma discharge and oxidation is caused owing to the effect ofthe OH radicals.

FIG. 11 and FIG. 12 show actually observed spectroscopic spectra of H₂,O₂, N₂O, and a mixed gas of these gasses at the time of plasmadischarge. In FIG. 11, a broken line shows a spectroscopic spectrum atthe time of plasma discharge in the case of flowing H₂ at a flow rate of1000 sccm, a thick solid line shows that in the case of flowing a mixedgas of H₂ and O₂ at flow rates of 800 sccm and 200 sccm, respectively,and a thin solid line shows that in the case of flowing O₂ at a flowrate of 1000 sccm. In FIG. 12, a broken line shows a spectroscopicspectrum at the time of plasma discharge in the case of flowing H₂ at aflow rate of 1000 sccm, a thick solid line shows that in the case offlowing a mixed gas of H₂ and N₂O at flow rates of 800 sccm and 200sccm, respectively, and a thin solid line shows that in the case offlowing N₂O at a flow rate of 1000 sccm. In these spectra, a peak (lightemission derived from O—H bonding) is observed in a spectroscopicspectrum range of 309 nm to 310 nm in the case of the mixed gas of H₂and O₂ and the mixed gas of H₂ and N₂O, while such a peak is notobserved in the case of a single gas of H₂, O₂, or N₂O. This mightsuggest that OH radicals are generated by plasma discharge with amixture of a H₂ gas and an oxidizing gas.

When the amount of H₂ is increased in the above-described mixed gases,the amount of O₂ or N₂O becomes smaller than that of H₂ at a certainflow rate ratio. In such a situation, there arises an excess of H atomsfor the number of O atoms in producing OH radicals. It is probable thatthe excess H atoms become H radicals during plasma discharge and cutbonds on the substrate surface, which are Si—Si bonds on the surface ofsingle crystal silicon or a silicon film and Si—N bonds on the SiNxsurface. Accordingly, the OH radicals may be likely to affect the bonds;as a result, oxidation of the film surface may be promoted.

This application is based on Japanese Patent Application Serial No.2011-093226 filed with Japan Patent Office on Apr. 19, 2011, the entirecontents of which are hereby incorporated by reference.

1. A method for manufacturing a semiconductor device comprising a thinfilm transistor including a gate electrode, a gate insulating filmcontaining nitrogen, and a microcrystalline semiconductor film, themethod comprising the steps of: performing plasma treatment on the gateinsulating film in an oxidizing gas atmosphere containing hydrogen andan oxidizing gas; and forming the microcrystalline semiconductor filmover the gate insulating film, wherein a/b≧2 and b>0 are satisfied,where an amount of the hydrogen and an amount of the oxidizing gas inthe oxidizing gas atmosphere are a and b, respectively.
 2. The methodfor manufacturing a semiconductor device according to claim 1, whereinthe oxidizing gas includes at least one of oxygen, NO₂, and N₂O.
 3. Amethod for manufacturing a semiconductor device comprising a thin filmtransistor including a gate electrode, a gate insulating film containingnitrogen, and a microcrystalline semiconductor film, the methodcomprising the steps of: performing plasma treatment on themicrocrystalline semiconductor film in an oxidizing gas atmospherecontaining hydrogen and an oxidizing gas; forming an insulating filmover the microcrystalline semiconductor film; and forming a back gateelectrode over the insulating film, wherein c/d≧2 and d>0 are satisfied,where an amount of the hydrogen and an amount of the oxidizing gas inthe oxidizing gas atmosphere are c and d, respectively.
 4. The methodfor manufacturing a semiconductor device according to claim 3, whereinthe oxidizing gas includes at least one of oxygen, NO₂, and N₂O.
 5. Amethod for manufacturing a semiconductor device comprising a thin filmtransistor including a gate electrode, a gate insulating film containingnitrogen, and a microcrystalline semiconductor film, the methodcomprising the steps of: forming the microcrystalline semiconductor filmover the gate insulating film; forming an amorphous semiconductor filmover the microcrystalline semiconductor film; performing plasmatreatment on the amorphous semiconductor film in an oxidizing gasatmosphere containing hydrogen and an oxidizing gas; forming aninsulating film over the amorphous semiconductor film; and forming aback gate electrode over the insulating film, wherein c/d≧2 and d>0 aresatisfied, where an amount of the hydrogen and an amount of theoxidizing gas in the oxidizing gas atmosphere are c and d, respectively.6. The method for manufacturing a semiconductor device according toclaim 5, wherein the oxidizing gas includes at least one of oxygen, NO₂,and N₂O.
 7. A plasma oxidation treatment method in which an insulatingfilm or a semiconductor film is exposed to plasma in an oxidizing gasatmosphere containing hydrogen and an oxidizing gas, wherein e/f≧2 andf>0 are satisfied, where an amount of the hydrogen and an amount of theoxidizing gas in the oxidizing gas atmosphere are e and f, respectively.8. The plasma oxidation treatment method according to claim 7, whereinthe oxidizing gas includes at least one of oxygen, NO₂, and N₂O.
 9. Theplasma oxidation treatment method according to claim 7, wherein theinsulating film contains nitrogen.